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Design and Implementation of Optimized LDPC for SDR Applications |
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| รหัสดีโอไอ | |
| Creator | D. Sahaya Lenin and Himanshu Shekhar |
| Title | Design and Implementation of Optimized LDPC for SDR Applications |
| Contributor | - |
| Publisher | TuEngr Group |
| Publication Year | 2564 |
| Journal Title | International Transaction Journal of Engineering, Management, & Applied Sciences & Technologies |
| Journal Vol. | 12 |
| Journal No. | 1 |
| Page no. | 12A1O: 1-10 |
| Keyword | Software-defined radio (SDR), LDPC Decoding, LDPC structure encoding, SDR architectures, Parity generation, optimized LDPC. |
| URL Website | http://TuEngr.com/Vol12_1.html |
| Website title | ITJEMAST V12(1) 2021 @ TuEngr.com |
| ISSN | 2228-9860 |
| Abstract | LDPC is a promising error correction protocol, which is widely useful for low-end wireless protocol standards. This lightweight protocol mechanism is suitable for basic SDR applications. The same is not true for high-end wireless communication due to its limitations. Since technological scaling on its own is insufficient to satisfy today's SDR architectures with these wireless standards. Hence by reducing the decoding complexity and by increasing capacity performance. We use this Low-Density Parity-Check codes in SDR based wireless communication platform. The major limitation of conventional LDPC code is high latency and power consumption with top design complexity. To overcome such a problem, the optimized LDPC encoding and decoding are proposed with less lag and power consumption without degrading the performance of the conventional design. The proposed model offers less hardware complexity used in telecommunication applications. This methodology is implemented and synthesized using Xilinx ISE tool. |
