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Motorcycle detection based on deep learning implemented on FPGA |
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| รหัสดีโอไอ | |
| Creator | 1. Feng Peng 2. Kittikhun Thongpull 3. Masami Ikura 4. Nattha Jindapetch |
| Title | Motorcycle detection based on deep learning implemented on FPGA |
| Publisher | Research and Development Office, Prince of Songkla University |
| Publication Year | 2564 |
| Journal Title | Songklanakarin Journal of Science an Technology (SJST) |
| Journal Vol. | 43 |
| Journal No. | 6 |
| Page no. | 1831-1839 |
| Keyword | motorcycle detection, deep learning, YOLOv2, FPGA, high-level synthesis |
| URL Website | https://rdo.psu.ac.th/sjst/index.php |
| ISSN | 0125-3395 |
| Abstract | This paper proposes a hardware accelerator design for motorcycle detection based on deep learning. We designed thetraining parameters by K-means algorithm and created the motorcycle dataset from Thailand's urban scene. Due to the rapidevolution of deep learning and the need for high-performance, low-power, and scalable models for application platforms, wedesigned the YOLOv2 accelerator architecture on the PYNQ platforms by using five optimization methods, including loopunrolling/pipeline, loop tiling, data quantization, memory ping-pong, and multi-channel data transmission. The proposed trainingparameters can increase the accuracy from the original 76.8% to 89.45%. The hardware experimental results obtained 14.10GOP/s (100MHz) and 25.98 GOP/s (150MHz) on the PYNQ (ZYNQ 7020). The performance of the acceleration platform thatwe designed is 6.32 times faster than that of the CPU (i7), and the energy consumption is 1/26 of the CPU. In addition, thehardware accelerated deep learning applications have in recent years improved a lot in accuracy and calculation speed. |
